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Searched refs:mmHPD0_DC_HPD_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h5200 #define mmHPD0_DC_HPD_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_3_offset.h4644 #define mmHPD0_DC_HPD_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_1_offset.h7497 #define mmHPD0_DC_HPD_CONTROL_BASE_IDX … macro
H A Ddcn_1_0_offset.h7814 #define mmHPD0_DC_HPD_CONTROL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h9374 #define mmHPD0_DC_HPD_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h9070 #define mmHPD0_DC_HPD_CONTROL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h10413 #define mmHPD0_DC_HPD_CONTROL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h10158 #define mmHPD0_DC_HPD_CONTROL_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h9699 #define mmHPD0_DC_HPD_CONTROL_BASE_IDX … macro