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Searched refs:mmGRBM_STATUS2 (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h30 #define mmGRBM_STATUS2 macro
H A Dgc_9_0_offset.h37 #define mmGRBM_STATUS2 macro
H A Dgc_9_1_offset.h37 #define mmGRBM_STATUS2 macro
H A Dgc_9_2_1_offset.h37 #define mmGRBM_STATUS2 macro
H A Dgc_10_1_0_offset.h2041 #define mmGRBM_STATUS2 macro
H A Dgc_10_3_0_offset.h2122 #define mmGRBM_STATUS2 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v2_1.c678 tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2); in gfxhub_v2_1_halt()
684 tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2); in gfxhub_v2_1_halt()
H A Dsdma_v5_2.c109 SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2)
H A Dsdma_v5_0.c108 SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2)
H A Dgfx_v8_0.c4845 || RREG32(mmGRBM_STATUS2) != 0x8) in gfx_v8_0_is_idle()
4855 if (RREG32(mmGRBM_STATUS2) != 0x8) in gfx_v8_0_rlc_is_idle()
4956 tmp = RREG32(mmGRBM_STATUS2); in gfx_v8_0_check_soft_reset()
H A Dgfx_v9_0.c155 SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2),
4155 tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2); in gfx_v9_0_soft_reset()
H A Dgfx_v7_0.c4562 tmp = RREG32(mmGRBM_STATUS2); in gfx_v7_0_soft_reset()
H A Dgfx_v10_0.c281 SOC15_REG_ENTRY_STR(GC, 0, mmGRBM_STATUS2),
7552 tmp = RREG32_SOC15(GC, 0, mmGRBM_STATUS2); in gfx_v10_0_soft_reset()
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h778 #define mmGRBM_STATUS2 0x2002 macro
H A Dgfx_7_0_d.h775 #define mmGRBM_STATUS2 0x2002 macro
H A Dgfx_7_2_d.h788 #define mmGRBM_STATUS2 0x2002 macro
H A Dgfx_8_1_d.h862 #define mmGRBM_STATUS2 0x2002 macro
H A Dgfx_8_0_d.h863 #define mmGRBM_STATUS2 0x2002 macro