Searched refs:mmGDS_VMID0_BASE (Results 1 – 9 of 9) sorted by relevance
| /linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_7_0_d.h | 2217 #define mmGDS_VMID0_BASE 0x3300 macro
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| H A D | gfx_7_2_d.h | 2239 #define mmGDS_VMID0_BASE 0x3300 macro
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| H A D | gfx_8_1_d.h | 2416 #define mmGDS_VMID0_BASE 0x3300 macro
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| H A D | gfx_8_0_d.h | 2437 #define mmGDS_VMID0_BASE 0x3300 macro
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v9_0.c | 2620 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * i, 0); in gfx_v9_0_init_compute_vmid()
2638 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * vmid, 0); in gfx_v9_0_init_gds_vmid()
4322 SOC15_REG_OFFSET(GC, 0, mmGDS_VMID0_BASE) + 2 * vmid, in gfx_v9_0_ring_emit_gds_switch()
4593 WREG32_SOC15(GC, 0, mmGDS_VMID0_BASE, 0x00000000); in gfx_v9_0_do_edc_gds_workarounds()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 3043 #define mmGDS_VMID0_BASE … macro
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| H A D | gc_9_1_offset.h | 3273 #define mmGDS_VMID0_BASE … macro
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| H A D | gc_9_2_1_offset.h | 3223 #define mmGDS_VMID0_BASE … macro
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| H A D | gc_10_1_0_offset.h | 5543 #define mmGDS_VMID0_BASE … macro
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