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Searched refs:mmGDS_EDC_OA_PHY_CNT (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_1_offset.h142 #define mmGDS_EDC_OA_PHY_CNT … macro
H A Dgc_9_0_offset.h879 #define mmGDS_EDC_OA_PHY_CNT … macro
H A Dgc_9_1_offset.h849 #define mmGDS_EDC_OA_PHY_CNT … macro
H A Dgc_10_1_0_offset.h2777 #define mmGDS_EDC_OA_PHY_CNT … macro
H A Dgc_10_3_0_offset.h2838 #define mmGDS_EDC_OA_PHY_CNT … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4.c55 { SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT), 0, 1, 1 },
166 { "GDS_PHY_CMD_RAM_MEM", SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT),
169 { "GDS_PHY_DATA_RAM_MEM", SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT),
172 { "GDS_ME0_CS_PIPE_MEM", SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT),
H A Dgfx_v9_0.c4560 { SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT), 0, 1, 1},
6392 { "GDS_ME0_CS_PIPE_MEM", SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT),
6397 SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT),
6402 SOC15_REG_ENTRY(GC, 0, mmGDS_EDC_OA_PHY_CNT),