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Searched refs:mmGC_EDC_CTRL (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_powertune.c695 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_EN_MASK, GC_EDC…
696 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_SW_RST_MASK, GC_EDC…
697 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, GC_EDC…
698 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_FORCE_STALL_MASK, GC_EDC…
699 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_TRIGGER_THROTTLE_LOWBIT_MASK, GC_EDC…
700 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_ALLOW_WRITE_PWRDELTA_MASK, GC_EDC…
710 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_EN_MASK, GC_EDC…
711 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_SW_RST_MASK, GC_EDC…
712 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_CLK_EN_OVERRIDE_MASK, GC_EDC…
713 …{ mmGC_EDC_CTRL, GC_EDC_CTRL__EDC_FORCE_STALL_MASK, GC_EDC…
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2969 #define mmGC_EDC_CTRL … macro
H A Dgc_9_1_offset.h3199 #define mmGC_EDC_CTRL … macro
H A Dgc_9_2_1_offset.h3155 #define mmGC_EDC_CTRL … macro
H A Dgc_10_1_0_offset.h5469 #define mmGC_EDC_CTRL … macro
H A Dgc_10_3_0_offset.h5092 #define mmGC_EDC_CTRL … macro