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Searched refs:mmGCVM_L2_CNTL3 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v2_0.c242 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, tmp); in gfxhub_v2_0_init_cache_regs()
382 WREG32_SOC15(GC, 0, mmGCVM_L2_CNTL3, 0); in gfxhub_v2_0_gart_disable()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h3201 #define mmGCVM_L2_CNTL3 … macro
H A Dgc_10_3_0_offset.h3104 #define mmGCVM_L2_CNTL3 0x15be macro
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