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Searched refs:mmGCVM_L2_CACHE_PARITY_CNTL (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfxhub_v2_1.c566 adev->gmc.VM_L2_CACHE_PARITY_CNTL = RREG32_SOC15(GC, 0, mmGCVM_L2_CACHE_PARITY_CNTL); in gfxhub_v2_1_save_regs()
601 WREG32_SOC15(GC, 0, mmGCVM_L2_CACHE_PARITY_CNTL, adev->gmc.VM_L2_CACHE_PARITY_CNTL); in gfxhub_v2_1_restore_regs()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h3251 #define mmGCVM_L2_CACHE_PARITY_CNTL … macro