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Searched refs:mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_offset.h3709 #define mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c3598 SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0xffffffff, 0x000fffff),