Home
last modified time | relevance | path

Searched refs:mmDP_DTO5_PHASE_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h615 #define mmDP_DTO5_PHASE_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h253 #define mmDP_DTO5_PHASE_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h235 #define mmDP_DTO5_PHASE_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h815 #define mmDP_DTO5_PHASE_BASE_IDX … macro