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Searched refs:mmDP_DTO3_PHASE (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3545 #define mmDP_DTO3_PHASE 0x014D macro
H A Ddce_8_0_d.h1048 #define mmDP_DTO3_PHASE 0x14d macro
H A Ddce_10_0_d.h1206 #define mmDP_DTO3_PHASE 0x14d macro
H A Ddce_11_0_d.h1018 #define mmDP_DTO3_PHASE 0x14d macro
H A Ddce_11_2_d.h1095 #define mmDP_DTO3_PHASE 0x14d macro
H A Ddce_12_0_offset.h798 #define mmDP_DTO3_PHASE … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h294 #define mmDP_DTO3_PHASE … macro
H A Ddcn_1_0_offset.h598 #define mmDP_DTO3_PHASE … macro
H A Ddcn_2_1_0_offset.h248 #define mmDP_DTO3_PHASE … macro
H A Ddcn_3_0_2_offset.h232 #define mmDP_DTO3_PHASE … macro
H A Ddcn_2_0_0_offset.h236 #define mmDP_DTO3_PHASE … macro
H A Ddcn_3_0_0_offset.h218 #define mmDP_DTO3_PHASE … macro