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Searched refs:mmDP_AUX3_AUX_DPHY_RX_CONTROL1 (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3478 #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 0x18CB macro
H A Ddce_8_0_d.h4260 #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 0x18cb macro
H A Ddce_10_0_d.h4908 #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 0x5c5f macro
H A Ddce_11_0_d.h4987 #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 0x5c5f macro
H A Ddce_11_2_d.h6249 #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 0x5c5f macro
H A Ddce_12_0_offset.h9936 #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h7718 #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 … macro
H A Ddcn_1_0_offset.h8051 #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 … macro
H A Ddcn_2_1_0_offset.h9609 #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 … macro
H A Ddcn_3_0_2_offset.h9305 #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 … macro
H A Ddcn_2_0_0_offset.h10662 #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 … macro
H A Ddcn_3_0_0_offset.h10407 #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 … macro