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Searched refs:mmDP_AUX0_AUX_SW_CONTROL (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3440 #define mmDP_AUX0_AUX_SW_CONTROL 0x1881 macro
H A Ddce_8_0_d.h4187 #define mmDP_AUX0_AUX_SW_CONTROL 0x1881 macro
H A Ddce_10_0_d.h4835 #define mmDP_AUX0_AUX_SW_CONTROL 0x5c01 macro
H A Ddce_11_0_d.h4914 #define mmDP_AUX0_AUX_SW_CONTROL 0x5c01 macro
H A Ddce_11_2_d.h6176 #define mmDP_AUX0_AUX_SW_CONTROL 0x5c01 macro
H A Ddce_12_0_offset.h9802 #define mmDP_AUX0_AUX_SW_CONTROL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h5224 #define mmDP_AUX0_AUX_SW_CONTROL … macro
H A Ddcn_3_0_3_offset.h4691 #define mmDP_AUX0_AUX_SW_CONTROL … macro
H A Ddcn_3_0_1_offset.h7572 #define mmDP_AUX0_AUX_SW_CONTROL … macro
H A Ddcn_1_0_offset.h7917 #define mmDP_AUX0_AUX_SW_CONTROL … macro
H A Ddcn_2_1_0_offset.h9463 #define mmDP_AUX0_AUX_SW_CONTROL … macro
H A Ddcn_3_0_2_offset.h9159 #define mmDP_AUX0_AUX_SW_CONTROL … macro
H A Ddcn_2_0_0_offset.h10516 #define mmDP_AUX0_AUX_SW_CONTROL … macro
H A Ddcn_3_0_0_offset.h10261 #define mmDP_AUX0_AUX_SW_CONTROL … macro