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Searched refs:mmDP5_DP_SEC_CNTL1 (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3411 #define mmDP5_DP_SEC_CNTL1 0x4BAB macro
H A Ddce_8_0_d.h4017 #define mmDP5_DP_SEC_CNTL1 0x4bab macro
H A Ddce_10_0_d.h4649 #define mmDP5_DP_SEC_CNTL1 0x4fc4 macro
H A Ddce_11_0_d.h4682 #define mmDP5_DP_SEC_CNTL1 0x4fc4 macro
H A Ddce_11_2_d.h5914 #define mmDP5_DP_SEC_CNTL1 0x4fc4 macro
H A Ddce_12_0_offset.h11680 #define mmDP5_DP_SEC_CNTL1 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9959 #define mmDP5_DP_SEC_CNTL1 … macro
H A Ddcn_3_0_2_offset.h11321 #define mmDP5_DP_SEC_CNTL1 … macro
H A Ddcn_2_0_0_offset.h12646 #define mmDP5_DP_SEC_CNTL1 … macro
H A Ddcn_3_0_0_offset.h12473 #define mmDP5_DP_SEC_CNTL1 … macro