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Searched refs:mmDP5_DP_SEC_AUD_M (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3406 #define mmDP5_DP_SEC_AUD_M 0x4BA7 macro
H A Ddce_8_0_d.h4073 #define mmDP5_DP_SEC_AUD_M 0x4ba7 macro
H A Ddce_10_0_d.h4705 #define mmDP5_DP_SEC_AUD_M 0x4fcb macro
H A Ddce_11_0_d.h4752 #define mmDP5_DP_SEC_AUD_M 0x4fcb macro
H A Ddce_11_2_d.h5984 #define mmDP5_DP_SEC_AUD_M 0x4fcb macro
H A Ddce_12_0_offset.h11694 #define mmDP5_DP_SEC_AUD_M macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9973 #define mmDP5_DP_SEC_AUD_M macro
H A Ddcn_3_0_2_offset.h11335 #define mmDP5_DP_SEC_AUD_M macro
H A Ddcn_2_0_0_offset.h12660 #define mmDP5_DP_SEC_AUD_M macro
H A Ddcn_3_0_0_offset.h12487 #define mmDP5_DP_SEC_AUD_M macro