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Searched refs:mmDP5_DP_MSE_SAT_UPDATE (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3404 #define mmDP5_DP_MSE_SAT_UPDATE 0x4BE7 macro
H A Ddce_8_0_d.h4145 #define mmDP5_DP_MSE_SAT_UPDATE 0x4be7 macro
H A Ddce_10_0_d.h4777 #define mmDP5_DP_MSE_SAT_UPDATE 0x4fd5 macro
H A Ddce_11_0_d.h4842 #define mmDP5_DP_MSE_SAT_UPDATE 0x4fd5 macro
H A Ddce_11_2_d.h6074 #define mmDP5_DP_MSE_SAT_UPDATE 0x4fd5 macro
H A Ddce_12_0_offset.h11712 #define mmDP5_DP_MSE_SAT_UPDATE … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9991 #define mmDP5_DP_MSE_SAT_UPDATE … macro
H A Ddcn_3_0_2_offset.h11353 #define mmDP5_DP_MSE_SAT_UPDATE … macro
H A Ddcn_2_0_0_offset.h12678 #define mmDP5_DP_MSE_SAT_UPDATE … macro
H A Ddcn_3_0_0_offset.h12505 #define mmDP5_DP_MSE_SAT_UPDATE … macro