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Searched refs:mmDP4_DP_DPHY_PRBS_CNTL (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3333 #define mmDP4_DP_DPHY_PRBS_CNTL 0x48D4 macro
H A Ddce_8_0_d.h3920 #define mmDP4_DP_DPHY_PRBS_CNTL 0x48d4 macro
H A Ddce_10_0_d.h4552 #define mmDP4_DP_DPHY_PRBS_CNTL 0x4eb5 macro
H A Ddce_11_0_d.h4542 #define mmDP4_DP_DPHY_PRBS_CNTL 0x4eb5 macro
H A Ddce_11_2_d.h5774 #define mmDP4_DP_DPHY_PRBS_CNTL 0x4eb5 macro
H A Ddce_12_0_offset.h11372 #define mmDP4_DP_DPHY_PRBS_CNTL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9629 #define mmDP4_DP_DPHY_PRBS_CNTL … macro
H A Ddcn_2_1_0_offset.h11213 #define mmDP4_DP_DPHY_PRBS_CNTL … macro
H A Ddcn_3_0_2_offset.h10965 #define mmDP4_DP_DPHY_PRBS_CNTL … macro
H A Ddcn_2_0_0_offset.h12298 #define mmDP4_DP_DPHY_PRBS_CNTL … macro
H A Ddcn_3_0_0_offset.h12109 #define mmDP4_DP_DPHY_PRBS_CNTL … macro