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Searched refs:mmDP4_DP_DPHY_CNTL (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3325 #define mmDP4_DP_DPHY_CNTL 0x48D0 macro
H A Ddce_8_0_d.h3872 #define mmDP4_DP_DPHY_CNTL 0x48d0 macro
H A Ddce_10_0_d.h4504 #define mmDP4_DP_DPHY_CNTL 0x4eaf macro
H A Ddce_11_0_d.h4482 #define mmDP4_DP_DPHY_CNTL 0x4eaf macro
H A Ddce_11_2_d.h5714 #define mmDP4_DP_DPHY_CNTL 0x4eaf macro
H A Ddce_12_0_offset.h11360 #define mmDP4_DP_DPHY_CNTL macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9617 #define mmDP4_DP_DPHY_CNTL macro
H A Ddcn_2_1_0_offset.h11201 #define mmDP4_DP_DPHY_CNTL macro
H A Ddcn_3_0_2_offset.h10953 #define mmDP4_DP_DPHY_CNTL macro
H A Ddcn_2_0_0_offset.h12286 #define mmDP4_DP_DPHY_CNTL macro
H A Ddcn_3_0_0_offset.h12097 #define mmDP4_DP_DPHY_CNTL macro