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Searched refs:mmDP4_DP_DPHY_8B10B_CNTL (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3324 #define mmDP4_DP_DPHY_8B10B_CNTL 0x48D3 macro
H A Ddce_8_0_d.h3912 #define mmDP4_DP_DPHY_8B10B_CNTL 0x48d3 macro
H A Ddce_10_0_d.h4544 #define mmDP4_DP_DPHY_8B10B_CNTL 0x4eb4 macro
H A Ddce_11_0_d.h4532 #define mmDP4_DP_DPHY_8B10B_CNTL 0x4eb4 macro
H A Ddce_11_2_d.h5764 #define mmDP4_DP_DPHY_8B10B_CNTL 0x4eb4 macro
H A Ddce_12_0_offset.h11370 #define mmDP4_DP_DPHY_8B10B_CNTL macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9627 #define mmDP4_DP_DPHY_8B10B_CNTL macro
H A Ddcn_2_1_0_offset.h11211 #define mmDP4_DP_DPHY_8B10B_CNTL macro
H A Ddcn_3_0_2_offset.h10963 #define mmDP4_DP_DPHY_8B10B_CNTL macro
H A Ddcn_2_0_0_offset.h12296 #define mmDP4_DP_DPHY_8B10B_CNTL macro
H A Ddcn_3_0_0_offset.h12107 #define mmDP4_DP_DPHY_8B10B_CNTL macro