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Searched refs:mmDP3_DP_MSE_SAT1 (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3298 #define mmDP3_DP_MSE_SAT1 0x45E5 macro
H A Ddce_8_0_d.h4127 #define mmDP3_DP_MSE_SAT1 0x45e5 macro
H A Ddce_10_0_d.h4759 #define mmDP3_DP_MSE_SAT1 0x4dd3 macro
H A Ddce_11_0_d.h4820 #define mmDP3_DP_MSE_SAT1 0x4dd3 macro
H A Ddce_11_2_d.h6052 #define mmDP3_DP_MSE_SAT1 0x4dd3 macro
H A Ddce_12_0_offset.h11140 #define mmDP3_DP_MSE_SAT1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h9028 #define mmDP3_DP_MSE_SAT1 macro
H A Ddcn_1_0_offset.h9367 #define mmDP3_DP_MSE_SAT1 macro
H A Ddcn_2_1_0_offset.h10931 #define mmDP3_DP_MSE_SAT1 macro
H A Ddcn_3_0_2_offset.h10670 #define mmDP3_DP_MSE_SAT1 macro
H A Ddcn_2_0_0_offset.h12018 #define mmDP3_DP_MSE_SAT1 macro
H A Ddcn_3_0_0_offset.h11814 #define mmDP3_DP_MSE_SAT1 macro