Home
last modified time | relevance | path

Searched refs:mmDP2_DP_SEC_CNTL1 (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3255 #define mmDP2_DP_SEC_CNTL1 0x42AB macro
H A Ddce_8_0_d.h4014 #define mmDP2_DP_SEC_CNTL1 0x42ab macro
H A Ddce_10_0_d.h4646 #define mmDP2_DP_SEC_CNTL1 0x4cc4 macro
H A Ddce_11_0_d.h4679 #define mmDP2_DP_SEC_CNTL1 0x4cc4 macro
H A Ddce_11_2_d.h5911 #define mmDP2_DP_SEC_CNTL1 0x4cc4 macro
H A Ddce_12_0_offset.h10828 #define mmDP2_DP_SEC_CNTL1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h8660 #define mmDP2_DP_SEC_CNTL1 macro
H A Ddcn_1_0_offset.h9029 #define mmDP2_DP_SEC_CNTL1 macro
H A Ddcn_2_1_0_offset.h10573 #define mmDP2_DP_SEC_CNTL1 macro
H A Ddcn_3_0_2_offset.h10298 #define mmDP2_DP_SEC_CNTL1 macro
H A Ddcn_2_0_0_offset.h11662 #define mmDP2_DP_SEC_CNTL1 macro
H A Ddcn_3_0_0_offset.h11442 #define mmDP2_DP_SEC_CNTL1 macro