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Searched refs:mmDP0_DP_SEC_PACKET_CNTL (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h3156 #define mmDP0_DP_SEC_PACKET_CNTL 0x1CAA macro
H A Ddce_8_0_d.h4092 #define mmDP0_DP_SEC_PACKET_CNTL 0x1caa macro
H A Ddce_10_0_d.h4724 #define mmDP0_DP_SEC_PACKET_CNTL 0x4ace macro
H A Ddce_11_0_d.h4777 #define mmDP0_DP_SEC_PACKET_CNTL 0x4ace macro
H A Ddce_11_2_d.h6009 #define mmDP0_DP_SEC_PACKET_CNTL 0x4ace macro
H A Ddce_12_0_offset.h10280 #define mmDP0_DP_SEC_PACKET_CNTL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h5544 #define mmDP0_DP_SEC_PACKET_CNTL … macro
H A Ddcn_3_0_3_offset.h5038 #define mmDP0_DP_SEC_PACKET_CNTL … macro
H A Ddcn_3_0_1_offset.h8000 #define mmDP0_DP_SEC_PACKET_CNTL … macro
H A Ddcn_1_0_offset.h8429 #define mmDP0_DP_SEC_PACKET_CNTL … macro
H A Ddcn_2_1_0_offset.h9933 #define mmDP0_DP_SEC_PACKET_CNTL … macro
H A Ddcn_3_0_2_offset.h9632 #define mmDP0_DP_SEC_PACKET_CNTL … macro
H A Ddcn_2_0_0_offset.h11026 #define mmDP0_DP_SEC_PACKET_CNTL … macro
H A Ddcn_3_0_0_offset.h10776 #define mmDP0_DP_SEC_PACKET_CNTL … macro