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Searched refs:mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h3750 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 0x175b macro
H A Ddce_10_0_d.h4377 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 0x167b macro
H A Ddce_11_0_d.h4332 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 0x167b macro
H A Ddce_11_2_d.h5564 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 0x167b macro
H A Ddce_12_0_offset.h1462 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h423 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 … macro
H A Ddcn_3_0_1_offset.h618 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 … macro
H A Ddcn_1_0_offset.h1048 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 … macro
H A Ddcn_2_1_0_offset.h678 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 … macro
H A Ddcn_3_0_2_offset.h590 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 … macro
H A Ddcn_2_0_0_offset.h716 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 … macro
H A Ddcn_3_0_0_offset.h606 #define mmDMCU_PERFMON_INTERRUPT_TO_UC_XIRQ_IRQ_SEL4 … macro