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Searched refs:mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_d.h4385 #define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 0x1635 macro
H A Ddce_11_0_d.h4335 #define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 0x1635 macro
H A Ddce_11_2_d.h5567 #define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 0x1635 macro
H A Ddce_12_0_offset.h1328 #define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h429 #define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 … macro
H A Ddcn_3_0_1_offset.h624 #define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 … macro
H A Ddcn_1_0_offset.h1054 #define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 … macro
H A Ddcn_2_1_0_offset.h684 #define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 … macro
H A Ddcn_3_0_2_offset.h596 #define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 … macro
H A Ddcn_2_0_0_offset.h722 #define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 … macro
H A Ddcn_3_0_0_offset.h612 #define mmDMCU_DPRX_INTERRUPT_TO_UC_EN_MASK1 … macro