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Searched refs:mmDMA_CH_1_WR_COMP_ADDR_LO (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Ddma_ch_1_regs.h38 #define mmDMA_CH_1_WR_COMP_ADDR_LO 0x409020 macro
/linux/drivers/accel/habanalabs/goya/
H A Dgoya.c4833 u32 channel_off = mmDMA_CH_1_WR_COMP_ADDR_LO - in goya_context_switch()