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Searched refs:mmDMA5_CORE_WR_RATE_LIM_CFG_0 (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/accel/habanalabs/include/gaudi/asic_reg/
H A Ddma5_core_regs.h114 #define mmDMA5_CORE_WR_RATE_LIM_CFG_0 0x5A0158 macro
/linux/drivers/accel/habanalabs/gaudi/
H A Dgaudi_security.c5024 mask |= 1U << ((mmDMA5_CORE_WR_RATE_LIM_CFG_0 & 0x7F) >> 2); in gaudi_init_dma_protection_bits()