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Searched refs:mmDIG5_TMDS_STEREOSYNC_CTL_SEL (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2985 #define mmDIG5_TMDS_STEREOSYNC_CTL_SEL 0x4B7F macro
H A Ddce_8_0_d.h3429 #define mmDIG5_TMDS_STEREOSYNC_CTL_SEL 0x4b7f macro
H A Ddce_10_0_d.h4208 #define mmDIG5_TMDS_STEREOSYNC_CTL_SEL 0x4f6e macro
H A Ddce_11_0_d.h4143 #define mmDIG5_TMDS_STEREOSYNC_CTL_SEL 0x4f6e macro
H A Ddce_11_2_d.h5374 #define mmDIG5_TMDS_STEREOSYNC_CTL_SEL 0x4f6e macro
H A Ddce_12_0_offset.h11592 #define mmDIG5_TMDS_STEREOSYNC_CTL_SEL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9873 #define mmDIG5_TMDS_STEREOSYNC_CTL_SEL … macro
H A Ddcn_3_0_2_offset.h11234 #define mmDIG5_TMDS_STEREOSYNC_CTL_SEL … macro
H A Ddcn_2_0_0_offset.h12554 #define mmDIG5_TMDS_STEREOSYNC_CTL_SEL … macro
H A Ddcn_3_0_0_offset.h12386 #define mmDIG5_TMDS_STEREOSYNC_CTL_SEL … macro