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Searched refs:mmDIG5_TMDS_CTL0_1_GEN_CNTL (Results 1 – 10 of 10) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2980 #define mmDIG5_TMDS_CTL0_1_GEN_CNTL 0x4B86 macro
H A Ddce_8_0_d.h3477 #define mmDIG5_TMDS_CTL0_1_GEN_CNTL 0x4b86 macro
H A Ddce_10_0_d.h4256 #define mmDIG5_TMDS_CTL0_1_GEN_CNTL 0x4f75 macro
H A Ddce_11_0_d.h4203 #define mmDIG5_TMDS_CTL0_1_GEN_CNTL 0x4f75 macro
H A Ddce_11_2_d.h5434 #define mmDIG5_TMDS_CTL0_1_GEN_CNTL 0x4f75 macro
H A Ddce_12_0_offset.h11602 #define mmDIG5_TMDS_CTL0_1_GEN_CNTL macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9883 #define mmDIG5_TMDS_CTL0_1_GEN_CNTL macro
H A Ddcn_3_0_2_offset.h11246 #define mmDIG5_TMDS_CTL0_1_GEN_CNTL macro
H A Ddcn_2_0_0_offset.h12566 #define mmDIG5_TMDS_CTL0_1_GEN_CNTL macro
H A Ddcn_3_0_0_offset.h12398 #define mmDIG5_TMDS_CTL0_1_GEN_CNTL macro