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Searched refs:mmDIG4_TMDS_STEREOSYNC_CTL_SEL (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2900 #define mmDIG4_TMDS_STEREOSYNC_CTL_SEL 0x487F macro
H A Ddce_8_0_d.h3428 #define mmDIG4_TMDS_STEREOSYNC_CTL_SEL 0x487f macro
H A Ddce_10_0_d.h4207 #define mmDIG4_TMDS_STEREOSYNC_CTL_SEL 0x4e6e macro
H A Ddce_11_0_d.h4142 #define mmDIG4_TMDS_STEREOSYNC_CTL_SEL 0x4e6e macro
H A Ddce_11_2_d.h5373 #define mmDIG4_TMDS_STEREOSYNC_CTL_SEL 0x4e6e macro
H A Ddce_12_0_offset.h11308 #define mmDIG4_TMDS_STEREOSYNC_CTL_SEL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9563 #define mmDIG4_TMDS_STEREOSYNC_CTL_SEL … macro
H A Ddcn_2_1_0_offset.h11139 #define mmDIG4_TMDS_STEREOSYNC_CTL_SEL … macro
H A Ddcn_3_0_2_offset.h10897 #define mmDIG4_TMDS_STEREOSYNC_CTL_SEL … macro
H A Ddcn_2_0_0_offset.h12226 #define mmDIG4_TMDS_STEREOSYNC_CTL_SEL … macro
H A Ddcn_3_0_0_offset.h12041 #define mmDIG4_TMDS_STEREOSYNC_CTL_SEL … macro