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Searched refs:mmDIG4_TMDS_CTL0_1_GEN_CNTL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9574 #define mmDIG4_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h11152 #define mmDIG4_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h10910 #define mmDIG4_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h12239 #define mmDIG4_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h12054 #define mmDIG4_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h11319 #define mmDIG4_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro