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Searched refs:mmDIG3_TMDS_CTL0_1_GEN_CNTL (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2810 #define mmDIG3_TMDS_CTL0_1_GEN_CNTL 0x4586 macro
H A Ddce_8_0_d.h3475 #define mmDIG3_TMDS_CTL0_1_GEN_CNTL 0x4586 macro
H A Ddce_10_0_d.h4254 #define mmDIG3_TMDS_CTL0_1_GEN_CNTL 0x4d75 macro
H A Ddce_11_0_d.h4201 #define mmDIG3_TMDS_CTL0_1_GEN_CNTL 0x4d75 macro
H A Ddce_11_2_d.h5432 #define mmDIG3_TMDS_CTL0_1_GEN_CNTL 0x4d75 macro
H A Ddce_12_0_offset.h11034 #define mmDIG3_TMDS_CTL0_1_GEN_CNTL macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9263 #define mmDIG3_TMDS_CTL0_1_GEN_CNTL macro
H A Ddcn_2_1_0_offset.h10821 #define mmDIG3_TMDS_CTL0_1_GEN_CNTL macro
H A Ddcn_3_0_2_offset.h10566 #define mmDIG3_TMDS_CTL0_1_GEN_CNTL macro
H A Ddcn_2_0_0_offset.h11910 #define mmDIG3_TMDS_CTL0_1_GEN_CNTL macro
H A Ddcn_3_0_0_offset.h11710 #define mmDIG3_TMDS_CTL0_1_GEN_CNTL macro