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Searched refs:mmDIG2_TMDS_CTL0_1_GEN_CNTL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h8954 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_2_1_0_offset.h10492 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_3_0_2_offset.h10224 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h11583 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
H A Ddcn_3_0_0_offset.h11368 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h10751 #define mmDIG2_TMDS_CTL0_1_GEN_CNTL_BASE_IDX … macro