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Searched refs:mmDIG1_HDMI_ACR_PACKET_CONTROL (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2624 #define mmDIG1_HDMI_ACR_PACKET_CONTROL 0x1F0F macro
H A Ddce_8_0_d.h2921 #define mmDIG1_HDMI_ACR_PACKET_CONTROL 0x1f0f macro
H A Ddce_10_0_d.h3700 #define mmDIG1_HDMI_ACR_PACKET_CONTROL 0x4b0c macro
H A Ddce_11_0_d.h3499 #define mmDIG1_HDMI_ACR_PACKET_CONTROL 0x4b0c macro
H A Ddce_11_2_d.h4730 #define mmDIG1_HDMI_ACR_PACKET_CONTROL 0x4b0c macro
H A Ddce_12_0_offset.h10332 #define mmDIG1_HDMI_ACR_PACKET_CONTROL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h5630 #define mmDIG1_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_3_0_3_offset.h5212 #define mmDIG1_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_3_0_1_offset.h8174 #define mmDIG1_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_1_0_offset.h8511 #define mmDIG1_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_2_1_0_offset.h10025 #define mmDIG1_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_3_0_2_offset.h9806 #define mmDIG1_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_2_0_0_offset.h11118 #define mmDIG1_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_3_0_0_offset.h10950 #define mmDIG1_HDMI_ACR_PACKET_CONTROL … macro