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Searched refs:mmDIG0_TMDS_CTL_BITS (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2557 #define mmDIG0_TMDS_CTL_BITS 0x1C83 macro
H A Ddce_8_0_d.h3456 #define mmDIG0_TMDS_CTL_BITS 0x1c83 macro
H A Ddce_10_0_d.h4235 #define mmDIG0_TMDS_CTL_BITS 0x4a72 macro
H A Ddce_11_0_d.h4178 #define mmDIG0_TMDS_CTL_BITS 0x4a72 macro
H A Ddce_11_2_d.h5409 #define mmDIG0_TMDS_CTL_BITS 0x4a72 macro
H A Ddce_12_0_offset.h10178 #define mmDIG0_TMDS_CTL_BITS macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_offset.h5440 #define mmDIG0_TMDS_CTL_BITS macro
H A Ddcn_3_0_3_offset.h4937 #define mmDIG0_TMDS_CTL_BITS macro
H A Ddcn_3_0_1_offset.h7902 #define mmDIG0_TMDS_CTL_BITS macro
H A Ddcn_1_0_offset.h8329 #define mmDIG0_TMDS_CTL_BITS macro
H A Ddcn_2_1_0_offset.h9825 #define mmDIG0_TMDS_CTL_BITS macro
H A Ddcn_3_0_2_offset.h9531 #define mmDIG0_TMDS_CTL_BITS macro
H A Ddcn_2_0_0_offset.h10920 #define mmDIG0_TMDS_CTL_BITS macro
H A Ddcn_3_0_0_offset.h10675 #define mmDIG0_TMDS_CTL_BITS macro