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Searched refs:mmDIG0_HDMI_ACR_PACKET_CONTROL (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h2539 #define mmDIG0_HDMI_ACR_PACKET_CONTROL 0x1C0F macro
H A Ddce_8_0_d.h2920 #define mmDIG0_HDMI_ACR_PACKET_CONTROL 0x1c0f macro
H A Ddce_10_0_d.h3699 #define mmDIG0_HDMI_ACR_PACKET_CONTROL 0x4a0c macro
H A Ddce_11_0_d.h3498 #define mmDIG0_HDMI_ACR_PACKET_CONTROL 0x4a0c macro
H A Ddce_11_2_d.h4729 #define mmDIG0_HDMI_ACR_PACKET_CONTROL 0x4a0c macro
H A Ddce_12_0_offset.h10048 #define mmDIG0_HDMI_ACR_PACKET_CONTROL … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_offset.h5310 #define mmDIG0_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_3_0_3_offset.h4869 #define mmDIG0_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_3_0_1_offset.h7834 #define mmDIG0_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_1_0_offset.h8201 #define mmDIG0_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_2_1_0_offset.h9695 #define mmDIG0_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_3_0_2_offset.h9463 #define mmDIG0_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_2_0_0_offset.h10790 #define mmDIG0_HDMI_ACR_PACKET_CONTROL … macro
H A Ddcn_3_0_0_offset.h10607 #define mmDIG0_HDMI_ACR_PACKET_CONTROL … macro