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Searched refs:mmDC_GPU_TIMER_READ (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1277 #define mmDC_GPU_TIMER_READ 0x1929 macro
H A Ddce_8_0_d.h1297 #define mmDC_GPU_TIMER_READ 0x1929 macro
H A Ddce_10_0_d.h1584 #define mmDC_GPU_TIMER_READ 0x482b macro
H A Ddce_11_0_d.h1409 #define mmDC_GPU_TIMER_READ 0x482b macro
H A Ddce_11_2_d.h1489 #define mmDC_GPU_TIMER_READ 0x482b macro
H A Ddce_12_0_offset.h1882 #define mmDC_GPU_TIMER_READ macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h455 #define mmDC_GPU_TIMER_READ macro
H A Ddcn_3_0_1_offset.h654 #define mmDC_GPU_TIMER_READ macro
H A Ddcn_1_0_offset.h1074 #define mmDC_GPU_TIMER_READ macro
H A Ddcn_2_1_0_offset.h710 #define mmDC_GPU_TIMER_READ macro
H A Ddcn_3_0_2_offset.h628 #define mmDC_GPU_TIMER_READ macro
H A Ddcn_2_0_0_offset.h748 #define mmDC_GPU_TIMER_READ macro
H A Ddcn_3_0_0_offset.h646 #define mmDC_GPU_TIMER_READ macro