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Searched refs:mmDCP0_DCP_GSL_CONTROL (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1517 #define mmDCP0_DCP_GSL_CONTROL 0x1A90 macro
H A Ddce_8_0_d.h2523 #define mmDCP0_DCP_GSL_CONTROL 0x1a90 macro
H A Ddce_10_0_d.h3302 #define mmDCP0_DCP_GSL_CONTROL 0x1a90 macro
H A Ddce_11_0_d.h3063 #define mmDCP0_DCP_GSL_CONTROL 0x1a90 macro
H A Ddce_11_2_d.h4294 #define mmDCP0_DCP_GSL_CONTROL 0x1a90 macro
H A Ddce_12_0_offset.h3754 #define mmDCP0_DCP_GSL_CONTROL … macro