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Searched refs:mmDB_RENDER_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h612 #define mmDB_RENDER_CONTROL 0xa000 macro
H A Dgfx_7_2_d.h625 #define mmDB_RENDER_CONTROL 0xa000 macro
H A Dgfx_8_1_d.h697 #define mmDB_RENDER_CONTROL 0xa000 macro
H A Dgfx_8_0_d.h697 #define mmDB_RENDER_CONTROL 0xa000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3343 #define mmDB_RENDER_CONTROL … macro
H A Dgc_9_1_offset.h3573 #define mmDB_RENDER_CONTROL … macro
H A Dgc_9_2_1_offset.h3523 #define mmDB_RENDER_CONTROL … macro
H A Dgc_10_1_0_offset.h5729 #define mmDB_RENDER_CONTROL … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c3067 data = RREG32(SOC15_REG_OFFSET(GC, 0, mmDB_RENDER_CONTROL)); in gfx_v9_0_enable_gfx_pipeline_powergating()