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Searched refs:mmD2VGA_CONTROL (Results 1 – 18 of 18) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_timing_generator.c398 offset = mmD2VGA_CONTROL - mmD1VGA_CONTROL; in dce120_timing_generator_disable_vga()
/linux/drivers/gpu/drm/amd/display/dc/dce110/
H A Ddce110_timing_generator.c1810 addr = mmD2VGA_CONTROL; in dce110_timing_generator_disable_vga()
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1042 #define mmD2VGA_CONTROL 0x00CE macro
H A Ddce_8_0_d.h5145 #define mmD2VGA_CONTROL 0xce macro
H A Ddce_10_0_d.h6028 #define mmD2VGA_CONTROL 0xce macro
H A Ddce_11_0_d.h6105 #define mmD2VGA_CONTROL 0xce macro
H A Ddce_11_2_d.h7779 #define mmD2VGA_CONTROL 0xce macro
H A Ddce_12_0_offset.h576 #define mmD2VGA_CONTROL … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v8_0.c1753 mmD2VGA_CONTROL,
H A Ddce_v10_0.c1806 mmD2VGA_CONTROL,
H A Ddce_v6_0.c1850 mmD2VGA_CONTROL,
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h39 #define mmD2VGA_CONTROL … macro
H A Ddcn_3_0_1_offset.h170 #define mmD2VGA_CONTROL … macro
H A Ddcn_1_0_offset.h410 #define mmD2VGA_CONTROL … macro
H A Ddcn_2_1_0_offset.h116 #define mmD2VGA_CONTROL … macro
H A Ddcn_3_0_2_offset.h54 #define mmD2VGA_CONTROL … macro
H A Ddcn_2_0_0_offset.h54 #define mmD2VGA_CONTROL … macro
H A Ddcn_3_0_0_offset.h36 #define mmD2VGA_CONTROL … macro