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Searched refs:mmCRTC_UPDATE_LOCK (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v8_0.c452 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 1); in dce_v8_0_disable_dce()
456 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 0); in dce_v8_0_disable_dce()
H A Ddce_v10_0.c494 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 1); in dce_v10_0_disable_dce()
498 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 0); in dce_v10_0_disable_dce()
H A Ddce_v6_0.c446 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 1); in dce_v6_0_disable_dce()
450 WREG32(mmCRTC_UPDATE_LOCK + crtc_offsets[i], 0); in dce_v6_0_disable_dce()
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1015 #define mmCRTC_UPDATE_LOCK 0x1BB5 macro
H A Ddce_8_0_d.h508 #define mmCRTC_UPDATE_LOCK 0x1bb5 macro
H A Ddce_10_0_d.h588 #define mmCRTC_UPDATE_LOCK 0x1bb5 macro
H A Ddce_11_0_d.h490 #define mmCRTC_UPDATE_LOCK 0x1bb5 macro
H A Ddce_11_2_d.h497 #define mmCRTC_UPDATE_LOCK 0x1bb5 macro