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Searched refs:mmCRTC0_CRTC_GSL_WINDOW (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dce120/
H A Ddce120_timing_generator.c261 dm_write_reg_soc15(tg->ctx, mmCRTC0_CRTC_GSL_WINDOW, tg110->offsets.crtc, 0); in dce120_timing_generator_setup_global_swap_lock()
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h511 #define mmCRTC0_CRTC_GSL_WINDOW 0x1B7A macro
H A Ddce_8_0_d.h845 #define mmCRTC0_CRTC_GSL_WINDOW 0x1b7a macro
H A Ddce_10_0_d.h973 #define mmCRTC0_CRTC_GSL_WINDOW 0x1b7a macro
H A Ddce_11_0_d.h785 #define mmCRTC0_CRTC_GSL_WINDOW 0x1b7a macro
H A Ddce_11_2_d.h834 #define mmCRTC0_CRTC_GSL_WINDOW 0x1b7a macro
H A Ddce_12_0_offset.h4258 #define mmCRTC0_CRTC_GSL_WINDOW … macro