Searched refs:mmCP_RB_WPTR_POLL_ADDR_LO (Results 1 – 13 of 13) sorted by relevance
| /linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_6_0_d.h | 523 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
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| H A D | gfx_7_0_d.h | 218 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
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| H A D | gfx_7_2_d.h | 218 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
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| H A D | gfx_8_1_d.h | 243 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
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| H A D | gfx_8_0_d.h | 242 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | gfx_v10_0.c | 450 SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO),
6384 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, in gfx_v10_0_cp_gfx_resume()
6421 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, in gfx_v10_0_cp_compute_enable()
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| H A D | gfx_v8_0.c | 4269 WREG32(mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v8_0_cp_gfx_resume()
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| H A D | gfx_v9_0.c | 3355 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v9_0_cp_compute_load_microcode()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2384 #define mmCP_RB_WPTR_POLL_ADDR_LO … macro
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| H A D | gc_9_1_offset.h | 2661 #define mmCP_RB_WPTR_POLL_ADDR_LO … macro
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| H A D | gc_9_2_1_offset.h | 2599 #define mmCP_RB_WPTR_POLL_ADDR_LO … macro
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| H A D | gc_10_1_0_offset.h | 5031 #define mmCP_RB_WPTR_POLL_ADDR_LO … macro
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| H A D | gc_10_3_0_offset.h | 4688 #define mmCP_RB_WPTR_POLL_ADDR_LO … macro
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