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Searched refs:mmCP_RB_WPTR_POLL_ADDR_LO (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h523 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
H A Dgfx_7_0_d.h218 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
H A Dgfx_7_2_d.h218 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
H A Dgfx_8_1_d.h243 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
H A Dgfx_8_0_d.h242 #define mmCP_RB_WPTR_POLL_ADDR_LO 0x3046 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v10_0.c450 SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO),
6407 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, in gfx_v10_0_cp_gfx_resume()
6444 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, in gfx_v10_0_cp_gfx_resume()
H A Dgfx_v8_0.c4269 WREG32(mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v8_0_cp_gfx_resume()
H A Dgfx_v9_0.c3384 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v9_0_cp_gfx_resume()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2384 #define mmCP_RB_WPTR_POLL_ADDR_LO macro
H A Dgc_9_1_offset.h2661 #define mmCP_RB_WPTR_POLL_ADDR_LO macro
H A Dgc_9_2_1_offset.h2599 #define mmCP_RB_WPTR_POLL_ADDR_LO macro
H A Dgc_10_1_0_offset.h5031 #define mmCP_RB_WPTR_POLL_ADDR_LO macro
H A Dgc_10_3_0_offset.h4688 #define mmCP_RB_WPTR_POLL_ADDR_LO macro