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Searched refs:mmCP_RB_WPTR_DELAY (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h512 #define mmCP_RB_WPTR_DELAY 0x21c1 macro
H A Dgfx_7_2_d.h525 #define mmCP_RB_WPTR_DELAY 0x21c1 macro
H A Dgfx_8_1_d.h578 #define mmCP_RB_WPTR_DELAY 0x21c1 macro
H A Dgfx_8_0_d.h578 #define mmCP_RB_WPTR_DELAY 0x21c1 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h215 #define mmCP_RB_WPTR_DELAY … macro
H A Dgc_9_1_offset.h215 #define mmCP_RB_WPTR_DELAY … macro
H A Dgc_9_2_1_offset.h209 #define mmCP_RB_WPTR_DELAY … macro
H A Dgc_10_1_0_offset.h2217 #define mmCP_RB_WPTR_DELAY … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c4248 WREG32(mmCP_RB_WPTR_DELAY, 0); in gfx_v8_0_cp_gfx_resume()
H A Dgfx_v9_0.c3401 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_DELAY, 0); in gfx_v9_0_cp_gfx_resume()
H A Dgfx_v10_0.c6518 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_DELAY, 0); in gfx_v10_0_cp_gfx_resume()