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Searched refs:mmCP_RB_WPTR (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h520 #define mmCP_RB_WPTR 0x3045 macro
H A Dgfx_7_0_d.h215 #define mmCP_RB_WPTR 0x3045 macro
H A Dgfx_7_2_d.h215 #define mmCP_RB_WPTR 0x3045 macro
H A Dgfx_8_1_d.h240 #define mmCP_RB_WPTR 0x3045 macro
H A Dgfx_8_0_d.h239 #define mmCP_RB_WPTR 0x3045 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2422 #define mmCP_RB_WPTR macro
H A Dgc_9_1_offset.h2699 #define mmCP_RB_WPTR macro
H A Dgc_9_2_1_offset.h2637 #define mmCP_RB_WPTR macro
H A Dgc_10_1_0_offset.h4763 #define mmCP_RB_WPTR macro
H A Dgc_10_3_0_offset.h4416 #define mmCP_RB_WPTR macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c167 SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_WPTR),
H A Dgfx_v10_0.c297 SOC15_REG_ENTRY_STR(GC, 0, mmCP_RB_WPTR),