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Searched refs:mmCP_RB0_RPTR_ADDR_HI (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h498 #define mmCP_RB0_RPTR_ADDR_HI 0x3044 macro
H A Dgfx_7_0_d.h210 #define mmCP_RB0_RPTR_ADDR_HI 0x3044 macro
H A Dgfx_7_2_d.h210 #define mmCP_RB0_RPTR_ADDR_HI 0x3044 macro
H A Dgfx_8_1_d.h235 #define mmCP_RB0_RPTR_ADDR_HI 0x3044 macro
H A Dgfx_8_0_d.h234 #define mmCP_RB0_RPTR_ADDR_HI 0x3044 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c2083 WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF); in gfx_v6_0_cp_gfx_resume()
H A Dgfx_v7_0.c2565 WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF); in gfx_v7_0_cp_gfx_resume()
H A Dgfx_v8_0.c4266 WREG32(mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & 0xFF); in gfx_v8_0_cp_gfx_resume()
H A Dgfx_v9_0.c3352 WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & CP_RB_RPTR_ADDR_HI__RB_RPTR_ADDR_HI_MASK); in gfx_v9_0_cp_compute_load_microcode()
H A Dgfx_v10_0.c6380 WREG32_SOC15(GC, 0, mmCP_RB0_RPTR_ADDR_HI, upper_32_bits(rptr_addr) & in gfx_v10_0_cp_gfx_resume()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2376 #define mmCP_RB0_RPTR_ADDR_HI … macro
H A Dgc_9_1_offset.h2653 #define mmCP_RB0_RPTR_ADDR_HI … macro
H A Dgc_9_2_1_offset.h2591 #define mmCP_RB0_RPTR_ADDR_HI … macro
H A Dgc_10_1_0_offset.h4721 #define mmCP_RB0_RPTR_ADDR_HI … macro
H A Dgc_10_3_0_offset.h4376 #define mmCP_RB0_RPTR_ADDR_HI … macro