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Searched refs:mmCP_MQD_BASE_ADDR_HI (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dpolaris10_pwrvirus.h1506 { 0x000000b4, mmCP_MQD_BASE_ADDR_HI },
1516 { 0x000000b4, mmCP_MQD_BASE_ADDR_HI },
1526 { 0x000000b4, mmCP_MQD_BASE_ADDR_HI },
1536 { 0x000000b4, mmCP_MQD_BASE_ADDR_HI },
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h568 #define mmCP_MQD_BASE_ADDR_HI 0x3246 macro
H A Dgfx_7_2_d.h581 #define mmCP_MQD_BASE_ADDR_HI 0x3246 macro
H A Dgfx_8_1_d.h631 #define mmCP_MQD_BASE_ADDR_HI 0x3246 macro
H A Dgfx_8_0_d.h631 #define mmCP_MQD_BASE_ADDR_HI 0x3246 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2821 #define mmCP_MQD_BASE_ADDR_HI macro
H A Dgc_9_1_offset.h3049 #define mmCP_MQD_BASE_ADDR_HI macro
H A Dgc_9_2_1_offset.h3005 #define mmCP_MQD_BASE_ADDR_HI macro
H A Dgc_10_1_0_offset.h5305 #define mmCP_MQD_BASE_ADDR_HI macro
H A Dgc_10_3_0_offset.h4938 #define mmCP_MQD_BASE_ADDR_HI macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c3684 WREG32_SOC15_RLC(GC, 0, mmCP_MQD_BASE_ADDR_HI, in gfx_v9_0_kiq_init_register()
H A Dgfx_v10_0.c6955 WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR_HI, in gfx_v10_0_kiq_init_register()