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Searched refs:mmCP_ME_RAM_WADDR (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h462 #define mmCP_ME_RAM_WADDR 0x3057 macro
H A Dgfx_7_0_d.h243 #define mmCP_ME_RAM_WADDR 0x3057 macro
H A Dgfx_7_2_d.h245 #define mmCP_ME_RAM_WADDR 0x3057 macro
H A Dgfx_8_1_d.h275 #define mmCP_ME_RAM_WADDR 0xf816 macro
H A Dgfx_8_0_d.h274 #define mmCP_ME_RAM_WADDR 0xf816 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v6_0.c1970 WREG32(mmCP_ME_RAM_WADDR, 0); in gfx_v6_0_cp_gfx_load_microcode()
1973 WREG32(mmCP_ME_RAM_WADDR, 0); in gfx_v6_0_cp_gfx_load_microcode()
1977 WREG32(mmCP_ME_RAM_WADDR, 0); in gfx_v6_0_cp_gfx_load_microcode()
H A Dgfx_v7_0.c2434 WREG32(mmCP_ME_RAM_WADDR, 0); in gfx_v7_0_cp_gfx_load_microcode()
2437 WREG32(mmCP_ME_RAM_WADDR, adev->gfx.me_fw_version); in gfx_v7_0_cp_gfx_load_microcode()
H A Dgfx_v9_0.c3243 WREG32_SOC15(GC, 0, mmCP_ME_RAM_WADDR, 0); in gfx_v9_0_cp_gfx_load_microcode()
3246 WREG32_SOC15(GC, 0, mmCP_ME_RAM_WADDR, adev->gfx.me_fw_version); in gfx_v9_0_cp_gfx_load_microcode()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6727 #define mmCP_ME_RAM_WADDR macro
H A Dgc_9_1_offset.h6951 #define mmCP_ME_RAM_WADDR macro
H A Dgc_9_2_1_offset.h6979 #define mmCP_ME_RAM_WADDR macro
H A Dgc_10_1_0_offset.h10249 #define mmCP_ME_RAM_WADDR macro
H A Dgc_10_3_0_offset.h9945 #define mmCP_ME_RAM_WADDR macro