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Searched refs:mmCP_MEC_ME1_UCODE_ADDR (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h250 #define mmCP_MEC_ME1_UCODE_ADDR 0x305c macro
H A Dgfx_7_2_d.h252 #define mmCP_MEC_ME1_UCODE_ADDR 0x305c macro
H A Dgfx_8_1_d.h282 #define mmCP_MEC_ME1_UCODE_ADDR 0xf81a macro
H A Dgfx_8_0_d.h281 #define mmCP_MEC_ME1_UCODE_ADDR 0xf81a macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_0.c3510 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, in gfx_v9_0_cp_compute_load_microcode()
3516 WREG32_SOC15(GC, 0, mmCP_MEC_ME1_UCODE_ADDR, in gfx_v9_0_cp_compute_load_microcode()
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6743 #define mmCP_MEC_ME1_UCODE_ADDR macro
H A Dgc_9_1_offset.h6967 #define mmCP_MEC_ME1_UCODE_ADDR macro
H A Dgc_9_2_1_offset.h6995 #define mmCP_MEC_ME1_UCODE_ADDR macro
H A Dgc_10_1_0_offset.h10257 #define mmCP_MEC_ME1_UCODE_ADDR macro