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Searched refs:mmCP_ME0_PIPE1_VMID (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_d.h241 #define mmCP_ME0_PIPE1_VMID 0x3053 macro
H A Dgfx_8_1_d.h266 #define mmCP_ME0_PIPE1_VMID 0x3053 macro
H A Dgfx_8_0_d.h265 #define mmCP_ME0_PIPE1_VMID 0x3053 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2418 #define mmCP_ME0_PIPE1_VMID macro
H A Dgc_9_1_offset.h2695 #define mmCP_ME0_PIPE1_VMID macro
H A Dgc_9_2_1_offset.h2633 #define mmCP_ME0_PIPE1_VMID macro
H A Dgc_10_1_0_offset.h4759 #define mmCP_ME0_PIPE1_VMID macro
H A Dgc_10_3_0_offset.h4412 #define mmCP_ME0_PIPE1_VMID macro