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Searched refs:mmCP_IQ_WAIT_TIME2 (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_amdkfd_gfx_v10.c1021 *wait_times = RREG32(SOC15_REG_OFFSET(GC, 0, mmCP_IQ_WAIT_TIME2)); in kgd_gfx_v10_get_iq_wait_times()
1044 *reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_IQ_WAIT_TIME2); in kgd_gfx_v10_build_grace_period_packet_info()
H A Damdgpu_amdkfd_gfx_v9.c910 mmCP_IQ_WAIT_TIME2); in kgd_gfx_v9_get_iq_wait_times()
1102 *reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_IQ_WAIT_TIME2); in kgd_gfx_v9_build_grace_period_packet_info()
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_0_d.h307 #define mmCP_IQ_WAIT_TIME2 0x30b0 macro
H A Dgfx_7_2_d.h309 #define mmCP_IQ_WAIT_TIME2 0x30b0 macro
H A Dgfx_8_1_d.h340 #define mmCP_IQ_WAIT_TIME2 0x30b0 macro
H A Dgfx_8_0_d.h340 #define mmCP_IQ_WAIT_TIME2 0x30b0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h2585 #define mmCP_IQ_WAIT_TIME2 … macro
H A Dgc_9_1_offset.h2855 #define mmCP_IQ_WAIT_TIME2 … macro
H A Dgc_9_2_1_offset.h2789 #define mmCP_IQ_WAIT_TIME2 … macro
H A Dgc_10_1_0_offset.h4927 #define mmCP_IQ_WAIT_TIME2 … macro
H A Dgc_10_3_0_offset.h4586 #define mmCP_IQ_WAIT_TIME2 … macro