Searched refs:mmCP_HQD_PQ_WPTR_POLL_ADDR_HI (Results 1 – 15 of 15) sorted by relevance
| /linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
| H A D | polaris10_pwrvirus.h | 1510 { 0x000000b4, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI },
1520 { 0x000000b4, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI },
1530 { 0x000000b4, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI },
1540 { 0x000000b4, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI },
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_amdkfd_gfx_v10_3.c | 255 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI, in hqd_load_v10_3()
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| H A D | amdgpu_amdkfd_gfx_v10.c | 269 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI, in kgd_hqd_load()
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| H A D | amdgpu_amdkfd_gfx_v9.c | 283 WREG32_SOC15_RLC(GC, GET_INST(GC, inst), mmCP_HQD_PQ_WPTR_POLL_ADDR_HI, in kgd_gfx_v9_hqd_load()
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| H A D | gfx_v9_0.c | 253 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI),
3710 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI, in gfx_v9_0_kiq_init_register()
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| H A D | gfx_v10_0.c | 395 SOC15_REG_ENTRY_STR(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI),
6981 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI, in gfx_v10_0_kiq_init_register()
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| H A D | gfx_7_0_d.h | 581 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253 macro
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| H A D | gfx_7_2_d.h | 594 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253 macro
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| H A D | gfx_8_1_d.h | 644 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253 macro
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| H A D | gfx_8_0_d.h | 644 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI 0x3253 macro
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| /linux/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 2847 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI … macro
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| H A D | gc_9_1_offset.h | 3075 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI … macro
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| H A D | gc_9_2_1_offset.h | 3031 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI … macro
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| H A D | gc_10_1_0_offset.h | 5331 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI … macro
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| H A D | gc_10_3_0_offset.h | 4964 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI … macro
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